/*******************************************************************************
 *
 * Copyright (c) 2004-2008 by Vivante Corp.  All rights reserved.
 *
 * The material in this file is confidential and contains trade secrets of
 * Vivante Corporation.  This is proprietary information owned by Vivante
 * Corporation.  No part of this work may be disclosed, reproduced, copied,
 * transmitted, or used in any way for any purpose, without the express
 * written permission of Vivante Corporation.
 *
 ******************************************************************************/

/*******************************************************************************
 *
 * This file is automatically generated on Mon Apr 13 01:22:32 2009
 *
 * Any changes made to this file are lost at the next compile run!
 * So better make sure you update the source .r files instead!
 *
 ******************************************************************************/

////////////////////////////////////////////////////////////////////////////////
//                               ~~~~~~~~~~~~~~                               //
//                               Module DmaUnit                               //
//                               ~~~~~~~~~~~~~~                               //
////////////////////////////////////////////////////////////////////////////////

// Register AQVertexElementCtrl (16 in total).
// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#define AQVertexElementCtrlRegAddrs                                       0x0180
#define AQ_VERTEX_ELEMENT_CTRL_Address                                   0x00600
#define AQ_VERTEX_ELEMENT_CTRL_MSB                                            15
#define AQ_VERTEX_ELEMENT_CTRL_LSB                                             4
#define AQ_VERTEX_ELEMENT_CTRL_Count                                          16
#define AQ_VERTEX_ELEMENT_CTRL_FieldMask                              0xFFFFF08F
#define AQ_VERTEX_ELEMENT_CTRL_ReadMask                               0xFFFFF08F
#define AQ_VERTEX_ELEMENT_CTRL_WriteMask                              0xFFFFF08F
#define AQ_VERTEX_ELEMENT_CTRL_ResetValue                             0x00000000

// when vertex control element 0 is written
// it is enabled and we disable all other VE controls
// then we followed by writing to VE control N
// (where N > 0) to enable the rest of the VE controls
// The following definitions are general for D3D and AQ2
// Driver need to translate to the proper usage
// BYTE         = 0x0
// UBYTE        = 0x1
// SHORT        = 0x2
// USHORT       = 0x3
// INT          = 0x4
// UINT         = 0x5
// DEC          = 0x6
// UDEC         = 0x7
// FLOAT        = 0x8
// FLOAT16      = 0x9
// D3DCOLOR     = 0xa
// FIXED16DOT16 = 0xb
#define AQ_VERTEX_ELEMENT_CTRL_FORMAT                                        3:0
#define AQ_VERTEX_ELEMENT_CTRL_FORMAT_End                                      3
#define AQ_VERTEX_ELEMENT_CTRL_FORMAT_Start                                    0
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_BYTE                                 0x0
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_UBYTE                                0x1
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_SHORT                                0x2
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_USHORT                               0x3
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_INT                                  0x4
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_UINT                                 0x5
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_DEC                                  0x6
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_UDEC                                 0x7
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_FLOAT                                0x8
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_FLOAT16                              0x9
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_D3DCOLOR                             0xA
#define   AQ_VERTEX_ELEMENT_CTRL_FORMAT_FIXED16DOT16                         0xB

// Enable a fetch break for the last element as well for any
// other element that has a gap between itself and the next
// element.
#define AQ_VERTEX_ELEMENT_CTRL_FETCH_BREAK                                   7:7
#define AQ_VERTEX_ELEMENT_CTRL_FETCH_BREAK_End                                 7
#define AQ_VERTEX_ELEMENT_CTRL_FETCH_BREAK_Start                               7
#define   AQ_VERTEX_ELEMENT_CTRL_FETCH_BREAK_DISABLE                         0x0
#define   AQ_VERTEX_ELEMENT_CTRL_FETCH_BREAK_ENABLE                          0x1

// 1 --> one elements
// 2 --> two elements
// 3 --> three elements
// 0 --> four element
#define AQ_VERTEX_ELEMENT_CTRL_SIZE                                        13:12
#define AQ_VERTEX_ELEMENT_CTRL_SIZE_End                                       13
#define AQ_VERTEX_ELEMENT_CTRL_SIZE_Start                                     12

// 0 --> Disable
// 1 --> D3D Normalization
// 2 --> OES Normalization
#define AQ_VERTEX_ELEMENT_CTRL_NORMALIZE                                   15:14
#define AQ_VERTEX_ELEMENT_CTRL_NORMALIZE_End                                  15
#define AQ_VERTEX_ELEMENT_CTRL_NORMALIZE_Start                                14
#define   AQ_VERTEX_ELEMENT_CTRL_NORMALIZE_DISABLE                           0x0
#define   AQ_VERTEX_ELEMENT_CTRL_NORMALIZE_D3D                               0x1
#define   AQ_VERTEX_ELEMENT_CTRL_NORMALIZE_OES                               0x2

// Offset into the vertex stream for the element.
#define AQ_VERTEX_ELEMENT_CTRL_OFFSET                                      23:16
#define AQ_VERTEX_ELEMENT_CTRL_OFFSET_End                                     23
#define AQ_VERTEX_ELEMENT_CTRL_OFFSET_Start                                   16

// Only required when FetchBreak is enabled.  Represents the
// number of bytes to fetch.
#define AQ_VERTEX_ELEMENT_CTRL_FETCH_SIZE                                  31:24
#define AQ_VERTEX_ELEMENT_CTRL_FETCH_SIZE_End                                 31
#define AQ_VERTEX_ELEMENT_CTRL_FETCH_SIZE_Start                               24

// Register AQCmdStreamBaseAddr.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~

// Reserved.

#define AQCmdStreamBaseAddrRegAddrs                                       0x0190
#define AQ_CMD_STREAM_BASE_ADDR_Address                                  0x00640
#define AQ_CMD_STREAM_BASE_ADDR_MSB                                           15
#define AQ_CMD_STREAM_BASE_ADDR_LSB                                            0
#define AQ_CMD_STREAM_BASE_ADDR_Count                                          1
#define AQ_CMD_STREAM_BASE_ADDR_FieldMask                             0xFFFFFFFF
#define AQ_CMD_STREAM_BASE_ADDR_ReadMask                              0xFFFFFFFC
#define AQ_CMD_STREAM_BASE_ADDR_WriteMask                             0xFFFFFFFC
#define AQ_CMD_STREAM_BASE_ADDR_ResetValue                            0x00000000

#define AQ_CMD_STREAM_BASE_ADDR_TYPE                                       31:31
#define AQ_CMD_STREAM_BASE_ADDR_TYPE_End                                      31
#define AQ_CMD_STREAM_BASE_ADDR_TYPE_Start                                    31
#define   AQ_CMD_STREAM_BASE_ADDR_TYPE_SYSTEM                                0x0
#define   AQ_CMD_STREAM_BASE_ADDR_TYPE_VIRTUAL_SYSTEM                        0x1

#define AQ_CMD_STREAM_BASE_ADDR_ADDRESS                                     30:0
#define AQ_CMD_STREAM_BASE_ADDR_ADDRESS_End                                   30
#define AQ_CMD_STREAM_BASE_ADDR_ADDRESS_Start                                  0

// Register AQIndexStreamBaseAddr.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

// Base address for the index stream.

#define AQIndexStreamBaseAddrRegAddrs                                     0x0191
#define AQ_INDEX_STREAM_BASE_ADDR_Address                                0x00644
#define AQ_INDEX_STREAM_BASE_ADDR_MSB                                         15
#define AQ_INDEX_STREAM_BASE_ADDR_LSB                                          0
#define AQ_INDEX_STREAM_BASE_ADDR_Count                                        1
#define AQ_INDEX_STREAM_BASE_ADDR_FieldMask                           0xFFFFFFFF
#define AQ_INDEX_STREAM_BASE_ADDR_ReadMask                            0xFFFFFFFC
#define AQ_INDEX_STREAM_BASE_ADDR_WriteMask                           0xFFFFFFFC
#define AQ_INDEX_STREAM_BASE_ADDR_ResetValue                          0x00000000

#define AQ_INDEX_STREAM_BASE_ADDR_TYPE                                     31:31
#define AQ_INDEX_STREAM_BASE_ADDR_TYPE_End                                    31
#define AQ_INDEX_STREAM_BASE_ADDR_TYPE_Start                                  31
#define   AQ_INDEX_STREAM_BASE_ADDR_TYPE_SYSTEM                              0x0
#define   AQ_INDEX_STREAM_BASE_ADDR_TYPE_VIRTUAL_SYSTEM                      0x1

#define AQ_INDEX_STREAM_BASE_ADDR_ADDRESS                                   30:0
#define AQ_INDEX_STREAM_BASE_ADDR_ADDRESS_End                                 30
#define AQ_INDEX_STREAM_BASE_ADDR_ADDRESS_Start                                0

// Register AQIndexStreamCtrl.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~
#define AQIndexStreamCtrlRegAddrs                                         0x0192
#define AQ_INDEX_STREAM_CTRL_Address                                     0x00648
#define AQ_INDEX_STREAM_CTRL_MSB                                              15
#define AQ_INDEX_STREAM_CTRL_LSB                                               0
#define AQ_INDEX_STREAM_CTRL_Count                                             1
#define AQ_INDEX_STREAM_CTRL_FieldMask                                0x00000001
#define AQ_INDEX_STREAM_CTRL_ReadMask                                 0x00000001
#define AQ_INDEX_STREAM_CTRL_WriteMask                                0x00000001
#define AQ_INDEX_STREAM_CTRL_ResetValue                               0x00000000

// Stride of the index buffer:
// 0 --> 8-bit indices.
// 1 --> 16-bit indices.
#define AQ_INDEX_STREAM_CTRL_STRIDE                                          0:0
#define AQ_INDEX_STREAM_CTRL_STRIDE_End                                        0
#define AQ_INDEX_STREAM_CTRL_STRIDE_Start                                      0
#define   AQ_INDEX_STREAM_CTRL_STRIDE_INDEX8                                 0x0
#define   AQ_INDEX_STREAM_CTRL_STRIDE_INDEX16                                0x1

// Register AQVertexStreamBaseAddr.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

// Base address for the vertex stream.

#define AQVertexStreamBaseAddrRegAddrs                                    0x0193
#define AQ_VERTEX_STREAM_BASE_ADDR_Address                               0x0064C
#define AQ_VERTEX_STREAM_BASE_ADDR_MSB                                        15
#define AQ_VERTEX_STREAM_BASE_ADDR_LSB                                         0
#define AQ_VERTEX_STREAM_BASE_ADDR_Count                                       1
#define AQ_VERTEX_STREAM_BASE_ADDR_FieldMask                          0xFFFFFFFF
#define AQ_VERTEX_STREAM_BASE_ADDR_ReadMask                           0xFFFFFFFC
#define AQ_VERTEX_STREAM_BASE_ADDR_WriteMask                          0xFFFFFFFC
#define AQ_VERTEX_STREAM_BASE_ADDR_ResetValue                         0x00000000

#define AQ_VERTEX_STREAM_BASE_ADDR_TYPE                                    31:31
#define AQ_VERTEX_STREAM_BASE_ADDR_TYPE_End                                   31
#define AQ_VERTEX_STREAM_BASE_ADDR_TYPE_Start                                 31
#define   AQ_VERTEX_STREAM_BASE_ADDR_TYPE_SYSTEM                             0x0
#define   AQ_VERTEX_STREAM_BASE_ADDR_TYPE_VIRTUAL_SYSTEM                     0x1

#define AQ_VERTEX_STREAM_BASE_ADDR_ADDRESS                                  30:0
#define AQ_VERTEX_STREAM_BASE_ADDR_ADDRESS_End                                30
#define AQ_VERTEX_STREAM_BASE_ADDR_ADDRESS_Start                               0

// Register AQVertexStreamCtrl.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~~
#define AQVertexStreamCtrlRegAddrs                                        0x0194
#define AQ_VERTEX_STREAM_CTRL_Address                                    0x00650
#define AQ_VERTEX_STREAM_CTRL_MSB                                             15
#define AQ_VERTEX_STREAM_CTRL_LSB                                              0
#define AQ_VERTEX_STREAM_CTRL_Count                                            1
#define AQ_VERTEX_STREAM_CTRL_FieldMask                               0x000001FF
#define AQ_VERTEX_STREAM_CTRL_ReadMask                                0x000001FF
#define AQ_VERTEX_STREAM_CTRL_WriteMask                               0x000001FF
#define AQ_VERTEX_STREAM_CTRL_ResetValue                              0x00000000

// Stride of the vertex stream in bytes.
#define AQ_VERTEX_STREAM_CTRL_STRIDE                                         8:0
#define AQ_VERTEX_STREAM_CTRL_STRIDE_End                                       8
#define AQ_VERTEX_STREAM_CTRL_STRIDE_Start                                     0

// Register AQCmdBufferAddr.
// ~~~~~~~~~~~~~~~~~~~~~~~~

// Base address for the command buffer.  The address must be
// 64-bit aligned.

#define AQCmdBufferAddrRegAddrs                                           0x0195
#define AQ_CMD_BUFFER_ADDR_Address                                       0x00654
#define AQ_CMD_BUFFER_ADDR_MSB                                                15
#define AQ_CMD_BUFFER_ADDR_LSB                                                 0
#define AQ_CMD_BUFFER_ADDR_Count                                               1
#define AQ_CMD_BUFFER_ADDR_FieldMask                                  0xFFFFFFFF
#define AQ_CMD_BUFFER_ADDR_ReadMask                                   0xFFFFFFFC
#define AQ_CMD_BUFFER_ADDR_WriteMask                                  0xFFFFFFFC
#define AQ_CMD_BUFFER_ADDR_ResetValue                                 0x00000000

#define AQ_CMD_BUFFER_ADDR_TYPE                                            31:31
#define AQ_CMD_BUFFER_ADDR_TYPE_End                                           31
#define AQ_CMD_BUFFER_ADDR_TYPE_Start                                         31
#define   AQ_CMD_BUFFER_ADDR_TYPE_SYSTEM                                     0x0
#define   AQ_CMD_BUFFER_ADDR_TYPE_VIRTUAL_SYSTEM                             0x1

#define AQ_CMD_BUFFER_ADDR_ADDRESS                                          30:0
#define AQ_CMD_BUFFER_ADDR_ADDRESS_End                                        30
#define AQ_CMD_BUFFER_ADDR_ADDRESS_Start                                       0

// Register AQCmdBufferCtrl.
// ~~~~~~~~~~~~~~~~~~~~~~~~
#define AQCmdBufferCtrlRegAddrs                                           0x0196
#define AQ_CMD_BUFFER_CTRL_Address                                       0x00658
#define AQ_CMD_BUFFER_CTRL_MSB                                                15
#define AQ_CMD_BUFFER_CTRL_LSB                                                 0
#define AQ_CMD_BUFFER_CTRL_Count                                               1
#define AQ_CMD_BUFFER_CTRL_FieldMask                                  0x0001FFFF
#define AQ_CMD_BUFFER_CTRL_ReadMask                                   0x0001FFFF
#define AQ_CMD_BUFFER_CTRL_WriteMask                                  0x0001FFFF
#define AQ_CMD_BUFFER_CTRL_ResetValue                                 0x00000000

// Number of 64-bit words to fetch from the command buffer.
#define AQ_CMD_BUFFER_CTRL_PREFETCH                                         15:0
#define AQ_CMD_BUFFER_CTRL_PREFETCH_End                                       15
#define AQ_CMD_BUFFER_CTRL_PREFETCH_Start                                      0

// Enable the command parser.
#define AQ_CMD_BUFFER_CTRL_ENABLE                                          16:16
#define AQ_CMD_BUFFER_CTRL_ENABLE_End                                         16
#define AQ_CMD_BUFFER_CTRL_ENABLE_Start                                       16
#define   AQ_CMD_BUFFER_CTRL_ENABLE_DISABLE                                  0x0
#define   AQ_CMD_BUFFER_CTRL_ENABLE_ENABLE                                   0x1

// Register AQFEStatus.
// ~~~~~~~~~~~~~~~~~~~
#define AQFEStatusRegAddrs                                                0x0197
#define AQFE_STATUS_Address                                              0x0065C
#define AQFE_STATUS_MSB                                                       15
#define AQFE_STATUS_LSB                                                        0
#define AQFE_STATUS_Count                                                      1
#define AQFE_STATUS_FieldMask                                         0x00000001
#define AQFE_STATUS_ReadMask                                          0x00000001
#define AQFE_STATUS_WriteMask                                         0x00000001
#define AQFE_STATUS_ResetValue                                        0x00000000

// Status of the command parser.
// 0 --> Idle
// 1 --> Busy
#define AQFE_STATUS_COMMAND_DATA                                             0:0
#define AQFE_STATUS_COMMAND_DATA_End                                           0
#define AQFE_STATUS_COMMAND_DATA_Start                                         0
#define   AQFE_STATUS_COMMAND_DATA_IDLE                                      0x0
#define   AQFE_STATUS_COMMAND_DATA_BUSY                                      0x1

// Register AQFEDebugState.
// ~~~~~~~~~~~~~~~~~~~~~~~

// Reserved.

#define AQFEDebugStateRegAddrs                                            0x0198
#define AQFE_DEBUG_STATE_Address                                         0x00660
#define AQFE_DEBUG_STATE_MSB                                                  15
#define AQFE_DEBUG_STATE_LSB                                                   0
#define AQFE_DEBUG_STATE_Count                                                 1
#define AQFE_DEBUG_STATE_FieldMask                                    0x0003FF1F
#define AQFE_DEBUG_STATE_ReadMask                                     0x0003FF1F
#define AQFE_DEBUG_STATE_WriteMask                                    0x0003FF1F
#define AQFE_DEBUG_STATE_ResetValue                                   0x00000000

#define AQFE_DEBUG_STATE_CMD_STATE                                           4:0
#define AQFE_DEBUG_STATE_CMD_STATE_End                                         4
#define AQFE_DEBUG_STATE_CMD_STATE_Start                                       0

#define AQFE_DEBUG_STATE_CMD_DMA_STATE                                       9:8
#define AQFE_DEBUG_STATE_CMD_DMA_STATE_End                                     9
#define AQFE_DEBUG_STATE_CMD_DMA_STATE_Start                                   8

#define AQFE_DEBUG_STATE_CMD_FETCH_STATE                                   11:10
#define AQFE_DEBUG_STATE_CMD_FETCH_STATE_End                                  11
#define AQFE_DEBUG_STATE_CMD_FETCH_STATE_Start                                10

#define AQFE_DEBUG_STATE_REQ_DMA_STATE                                     13:12
#define AQFE_DEBUG_STATE_REQ_DMA_STATE_End                                    13
#define AQFE_DEBUG_STATE_REQ_DMA_STATE_Start                                  12

#define AQFE_DEBUG_STATE_CAL_STATE                                         15:14
#define AQFE_DEBUG_STATE_CAL_STATE_End                                        15
#define AQFE_DEBUG_STATE_CAL_STATE_Start                                      14

#define AQFE_DEBUG_STATE_VE_REQ_STATE                                      17:16
#define AQFE_DEBUG_STATE_VE_REQ_STATE_End                                     17
#define AQFE_DEBUG_STATE_VE_REQ_STATE_Start                                   16

// Register AQFEDebugCurCmdAdr.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~~

// This is the command decoder address.

#define AQFEDebugCurCmdAdrRegAddrs                                        0x0199
#define AQFE_DEBUG_CUR_CMD_ADR_Address                                   0x00664
#define AQFE_DEBUG_CUR_CMD_ADR_MSB                                            15
#define AQFE_DEBUG_CUR_CMD_ADR_LSB                                             0
#define AQFE_DEBUG_CUR_CMD_ADR_Count                                           1
#define AQFE_DEBUG_CUR_CMD_ADR_FieldMask                              0xFFFFFFF8
#define AQFE_DEBUG_CUR_CMD_ADR_ReadMask                               0xFFFFFFF8
#define AQFE_DEBUG_CUR_CMD_ADR_WriteMask                              0xFFFFFFF8
#define AQFE_DEBUG_CUR_CMD_ADR_ResetValue                             0x00000000

#define AQFE_DEBUG_CUR_CMD_ADR_CUR_CMD_ADR                                  31:3
#define AQFE_DEBUG_CUR_CMD_ADR_CUR_CMD_ADR_End                                31
#define AQFE_DEBUG_CUR_CMD_ADR_CUR_CMD_ADR_Start                               3

// Register AQFEDebugCmdLowReg.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~~

// Reserved.

#define AQFEDebugCmdLowRegRegAddrs                                        0x019A
#define AQFE_DEBUG_CMD_LOW_REG_Address                                   0x00668
#define AQFE_DEBUG_CMD_LOW_REG_MSB                                            15
#define AQFE_DEBUG_CMD_LOW_REG_LSB                                             0
#define AQFE_DEBUG_CMD_LOW_REG_Count                                           1
#define AQFE_DEBUG_CMD_LOW_REG_FieldMask                              0xFFFFFFFF
#define AQFE_DEBUG_CMD_LOW_REG_ReadMask                               0xFFFFFFFF
#define AQFE_DEBUG_CMD_LOW_REG_WriteMask                              0xFFFFFFFF
#define AQFE_DEBUG_CMD_LOW_REG_ResetValue                             0x00000000

// Command register used by CmdState.
#define AQFE_DEBUG_CMD_LOW_REG_CMD_LOW_REG                                  31:0
#define AQFE_DEBUG_CMD_LOW_REG_CMD_LOW_REG_End                                31
#define AQFE_DEBUG_CMD_LOW_REG_CMD_LOW_REG_Start                               0

// Register AQFEDebugCmdHiReg.
// ~~~~~~~~~~~~~~~~~~~~~~~~~~

// Reserved.

#define AQFEDebugCmdHiRegRegAddrs                                         0x019B
#define AQFE_DEBUG_CMD_HI_REG_Address                                    0x0066C
#define AQFE_DEBUG_CMD_HI_REG_MSB                                             15
#define AQFE_DEBUG_CMD_HI_REG_LSB                                              0
#define AQFE_DEBUG_CMD_HI_REG_Count                                            1
#define AQFE_DEBUG_CMD_HI_REG_FieldMask                               0xFFFFFFFF
#define AQFE_DEBUG_CMD_HI_REG_ReadMask                                0xFFFFFFFF
#define AQFE_DEBUG_CMD_HI_REG_WriteMask                               0xFFFFFFFF
#define AQFE_DEBUG_CMD_HI_REG_ResetValue                              0x00000000

// Command register used by CmdState.
#define AQFE_DEBUG_CMD_HI_REG_CMD_HI_REG                                    31:0
#define AQFE_DEBUG_CMD_HI_REG_CMD_HI_REG_End                                  31
#define AQFE_DEBUG_CMD_HI_REG_CMD_HI_REG_Start                                 0

